Variable-Complexity Multidisciplinary Design Optimization Using Parallel Computers

Intl. Conf. on Computational Engineering Science
July 30 - August 3, 1995
Hawaii, USA

A.A. Giunta, V. Balabanov, S. Burgee,
B. Grossman, R.T. Haftka, W.H. Mason, and L.T. Watson


Summary

The use of multidisciplinary optimization techniques in aerospace vehicle design often is limited because of the significant computational expense incurred in the analysis of the vehicle and its many systems. In response to this difficulty, a variable-complexity modeling approach, involving the use of refined and computationally expensive models together with simple and computationally inexpensive models has been developed. This variable-complexity technique has been previously applied to the combined aerodynamic-structural optimization of subsonic transport aircraft wings and the aerodynamic-structural optimization of the High Speed Civil Transport (HSCT).

In related research conducted by members of the MAD Center at Virginia Tech, convergence difficulties were encountered in the aerodynamic-structural optimization of the HSCT. The convergence problems were traced to numerical noise in the computation of aerodynamic drag components which inhibited the use of gradient based optimization techniques. An example problem, which involved two design variables, was used to determine the feasibility of using a response surface methodology in conjunction with our existing multidisciplinary analysis tools. The long term goal of this research effort is to apply the response-surface methods to the full HSCT design optimization problem. Such applications of response surface methods to vehicle design have proven successful in previous studies, e.g..

To efficiently use non-derivative-based optimization involving response surface approximation, we have developed a coarse grained parallel implementation of our HSCT analysis codes. In addition, we have produced parallel versions of existing finite-element analysis codes. The aerodynamic and structural analysis codes have been implemented on Virginia Tech's twenty-eight node Intel Paragon parallel computer (a distributed memory architecture with 32 MB of memory at each node).

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